The present invention relates to a semiconductor device and a method for fabricating the same.
Three-dimensional (3D) packaging technologies for stacking individual semiconductor chips have recently been developed. Among them, through silicon via contact technology, which substitutes for existing wire bonding technology, is a packaging technology in which a via-hole is formed to penetrate a substrate and an electrode is formed in the via-hole.
Since semiconductor chips are being made thinner and since more than several thousands of through silicon via contacts may be formed in a single chip, problems have arisen that may affect the reliability of the semiconductor chips due to the through silicon via contacts.